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12th IEEE Workshop on Silicon Errors in Logic – System Effects 
(SELSE’16) 
29-30 March 2016 
Austin, TX, USA 
http://www.selse.org
CALL FOR PARTICIPATION 

Scope

The growing complexity and shrinking geometries of modern manufacturing technologies are making high-density, low-voltage devices increasingly susceptible to the influences of electrical noise, process variation, transistor aging, and the effects of natural radiation. The system-level impact of these errors can be far-reaching. Growing concern about intermittent errors, unstable storage cells, and the effects of aging are influencing system design and failures in memories account for a significant fraction of costly product returns. Emerging logic and memory device technologies introduce several reliability challenges that need to be addressed to make these technologies viable. Additionally, reliability is a key issue for large-scale systems, such as those in data centers and cloud computing infrastructure.

The SELSE workshop provides a forum for discussion of current research and practice in system-level error management. Participants from industry and academia explore both current technologies and future research directions. 

Program Highlights

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SELSE 2016 will feature three keynote speeches by experts from academia and industry.
 
Dr. Krishna V. Palem from Rice University

Can the end of Moore’s Law result in new opportunities for computing?

 
Dr. Nirmal Saxena from NVIDIA

Autonomous car is the new driver for resilient computing and design-for-test.

 
Dr. Martin Roetteler from Microsoft Research

Quantum error correction and quantum algorithmic discovery 

Panel Discussion

We will have a very interesting panel on the topic of approximate computing with experts from academia and industry. The panel discussion will explore opportunities and challenges of approximate computing in the field of reliability.
 
Random Access Session

SELSE 2016 will feature a "random access" session in which any registered participant (time permitting) may give a very brief talk to highlight some recent advance or issue of interest. The intent is to give the opportunity for an informal platform within the community. Please sign up in advance by filling in the form below. Sign up will also be available during the first day of the workshop.
http://goo.gl/forms/lXhg0dRhBc


Registration and Accommodation 

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Registration for the SELSE workshop is now open with early registration ending March 14th, 2016.  
 
Registration:  http://selse.org/index.php?option=com_content&view=article&id=105&Itemid=66
 
NEW! Travel grants are available to attend SELSE 2016!
We are very excited to offer, for the first time, travel grants to young faculties, postdocs, and students.  Please refer to SELSE web page for application instructions.  Submit your application by March 6th.
Travel grant information:

http://selse.org/index.php?option=com_content&view=article&id=282&Itemid=71

Please do not forget to book your hotels early, as the hotel prices can increase closer to the SELSE dates.  You can find a list of nearby hotels on the SELSE web page.

Transportation and Local Information:  

http://selse.org/index.php?option=com_content&view=article&id=70&Itemid=41

Additional Information 
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Connect with SELSE on social media!
https://www.linkedin.com/groups/8320237
https://www.facebook.com/SELSEworkshop/
https://twitter.com/SELSE_IEEE

Committee 
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General Chair:

  • Helia Naeimi, Intel
  • Dan Alexandrescu, iRoC

Program Chair:

  • Sudhanva Gurumurthi, IBM/University of Virginia
  • Mattan Erez, The University of Texas at Austin

Finance Chair:

  • Siva Hari, NVIDIA
  • Daniel Lowell, AMD

Publicity Chair:

  • William H. Robinson, Vanderbilt University
  • Paolo Rech, UFRG
  • Yiannakis Sazeides, University of Cyprus

Documents Chair:

  • Mehdi Tahoori, Karlsruhe Institute of Technology
  • Mojtaba Ebrahimi, Karlsruhe Institute of Technology

Austin Industry Liaison:

  • Indrani Paul, AMD

Webmaster:

  • Marios Kleanthous, Mesoyios College

Local Arrangements Chair:

  • Vijay Janapa Reddi, The University of Texas at Austin

Advisors to the Committee:
  • Sarah Michalak, LANL
  • Alan Wood, Oracle
  • Vilas Sridharan, AMD
  • Adrian Evans, iRoC

For more information, visit us on the web at: http://www.selse.org

The 12th IEEE Workshop on Silicon Errors in Logic – System Effects is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).



IEEE Computer Society- Test Technology Technical Council

TTTC CHAIR 
Michael NICOLAIDIS 
TIMA Laboratory - France 
Tel. +33-4-765-74696 
E-mail michael.nicolaidis@imag.fr

PAST CHAIR 
Adit D. SINGH  
Auburn University - USA  
Tel.  +1-334-844-1847 
E-mail adsingh@eng.auburn.edu

TTTC 1ST VICE CHAIR 
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chen-huan.chiang@alcatel-lucent.com

SECRETARY
Joan FIGUERAS
Un. Politec. de Catalunya - Spain
Tel. +34-93-401-6603
E-mail figueras@eel.upc.es

ITC GENERAL CHAIR 
Michael Purtell
Intersil 
- USA 
Tel. +1-408-372-6015 
E-mail m.purtell@ieee.org

TEST WEEK COORDINATOR
Yervant ZORIAN 
Synopsys, Inc.  USA 
Tel. +1-650-584-7120 
E-mail Yervant.Zorian@synopsys.com

TUTORIALS AND EDUCATION
Paolo BERNARDI
 
Politecnico di Torino
 - Italy
Tel. +39-011-564-7183
E-mail paolo.bernardi@polito.it

STANDARDS
Rohit KAPUR

Synopsys
, Inc. - USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Giorgio DI NATALE
LIRMM - France
Tel. +33-467-41-85-01
E-mail giorgio.dinatale@lirmm.fr

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES 
André IVANOV 
University of British Columbia - Canada 
Tel. +1-604-822-6936 
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA 
Giorgio DI NATALE
LIRMM - France
Tel. +33-467-41-85-01
E-mail giorgio.dinatale@lirmm.fr

 

PRESIDENT OF BOARD 
Yervant ZORIAN
Synopsys, Inc.  USA 
Tel. +1-650-584-7120 
E-mail Yervant.Zorian@synopsys.com

SENIOR PAST CHAIR 
André IVANOV 
University of British Columbia - Canada 
Tel. +1-604-822-6936 
E-mail ivanov@ece.ubc.ca

TTTC 2ND VICE CHAIR 
Rohit KAPUR
 
Synopsys, Inc. 
USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

FINANCE 
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chen-huan.chiang@alcatel-lucent.com

IEEE DESIGN & TEST EIC 
André IVANOV
U. of British Columbia Canada 
Tel. +1 
E-mail ivanov@ece.ubc.ca

TECHNICAL MEETINGS 
Chen-Huan CHIANG 
Alcatel-Lucent
 - USA
Tel. +1-973-386-6759
E-mail chenhuan@alcatel-lucent.com

TECHNICAL ACTIVITIES 
Matteo SONZA REORDA
Politecnico di Torino Italy
Tel.+39 090 7055
E-mail patrick.girard@lirmm.fr

ASIA & PACIFIC 
Kazumi HATAYAMA
Gumma University - Japan
Tel.+81-277-30-1111
E-mail k-hatayama@el.gunma-u.ac.jp

LATIN AMERICA 
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

NORTH AMERICA 
André IVANOV 
University of British Columbia - Canada 
Tel. +1-604-822-6936 
E-mail ivanov@ece.ubc.ca

COMMUNICATIONS
Cecilia METRA 
Università di Bologna - Italy
Tel. +39-051-209-3038 
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Synopsys, Inc.  USA 
Tel. +1-650-584-7120 
E-mail Yervant.Zorian@synopsys.com


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